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Enhancing instruction scheduling with a block-structured ISA
1995
International journal of parallel programming
It is now generally recognized that not enough parallelism exists within the small basic blocks of most general purpose programs to satisfy high performance processors. Thus, a wide variety of techniques have been developed to exploit instruction level parallelism across basic block boundaries. In this paper we discuss some previous techniques along with their hardware and software requirements. Then we propose a new paradigm for an instruction set architecture (ISA): block-structuring. This
doi:10.1007/bf02577867
fatcat:yo27fovzwvfsvp6uddauzidjyu