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Due to the ever increasing complexity of embedded and cyber-physical systems, corresponding design solutions relying on modelling languages such as Unified Modelling Language (UML)/Object Constraint Language (OCL) find increasing attention. Due to the recent success of formal verification techniques, UML/OCL models also allow to verify and/or check certain properties of a given model in early stages of the design phase. To this end, different approaches for verification and validation have beendoi:10.1049/iet-cps.2016.0022 fatcat:mr4s7nhfabatfmz3ypzmwxq4xa