Taming x86-TSO Persistency (Extended Version) [article]

Artem Khyzha, Ori Lahav
<span title="2020-10-27">2020</span> <i > arXiv </i> &nbsp; <span class="release-stage" >pre-print</span>
We study the formal semantics of non-volatile memory in the x86-TSO architecture. We show that while the explicit persist operations in the recent model of Raad et al. from POPL'20 only enforce order between writes to the non-volatile memory, it is equivalent, in terms of reachable states, to a model whose explicit persist operations mandate that prior writes are actually written to the non-volatile memory. The latter provides a novel model that is much closer to common developers'
more &raquo; ... of persistency semantics. We further introduce a simpler and stronger sequentially consistent persistency model, develop a sound mapping from this model to x86, and establish a data-race-freedom guarantee providing programmers with a safe programming discipline. Our operational models are accompanied with equivalent declarative formulations, which facilitate our formal arguments, and may prove useful for program verification under x86 persistency.
<span class="external-identifiers"> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/2010.13593v2">arXiv:2010.13593v2</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/swpqdfnd7jghxh3xhtyssmazbu">fatcat:swpqdfnd7jghxh3xhtyssmazbu</a> </span>
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