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An integrated performance and power model for superscalar processor designs
2005
Proceedings of the 2005 conference on Asia South Pacific design automation - ASP-DAC '05
On current superscalar processors, performance and power issues cannot be decoupled for designers. Extensive simulations are usually required to meet both power and performance constraints. This paper describes an integrated performance and power analytical model. The model's performance and power results are in good agreement with detailed simulations, previous models and physically measured results. For designers, the model enables quick and flexible explorations into a subset of even entire
doi:10.1145/1120725.1120764
dblp:conf/aspdac/ZhuWA05
fatcat:wj5ai747dreptiqi6vnmvhm3ci