Diagnosis-aware system design for automotive E/E architectures

Peter Waszecki, Florian Sagstetter, Martin Lukasiewycz, Samarjit Chakraborty
2014 2014 International Symposium on Integrated Circuits (ISIC)  
This paper proposes a schedule synthesis approach taking fault diagnosis and testability into account at design time. Over the last years, the amount of automotive software and hardware has been successively growing. As a consequence, the complexity of present-day Electrical and Electronic (E/E) architectures reached a state where current fault detection mechanisms are often not sufficient or computationally too expensive to guarantee a reliable system functionality. As a remedy, we propose a
more » ... vel design methodology, optimizing a subsequent fault diagnosis in terms of the necessary detection time as well as the diagnostic resolution. Our approach is based on a time-triggered architecture and aims at a decentralized message-based fault diagnosis solution. In order to increase the system reliability, during schedule synthesis a modified and adapted message distribution is taken into account which additionally considers previously undiagnosable resources. While our approach might lead to a slightly increased bandwidth utilization, it clearly improves the overall diagnosis of faulty resources by a reduced detection time and an increased diagnostic resolution.
doi:10.1109/isicir.2014.7029550 dblp:conf/isicir/WaszeckiSLC14 fatcat:datm5x7trvae7b5rdj6yap6e4i