An integrated 17 GHz front-end for ISM/WLAN applications in 0.13 μm CMOS

C. Kienmayer, R. Thuringer, M. Tiebout, W. Simburger, A.L. Scholtz
2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525)  
This paper presents an integrated front-end for ISM/WLAN applications at 17.3 GHz in 0.13 µm standard CMOS. The front-end chip includes an inductive source-degenerated low noise amplifier (LNA), a transformer-based Gilbert-mixer, an intermediate frequency (IF) amplifier and a buffer for the local oscillator (LO) input. The integrated receiver front-end achieves a gain of 34.7 dB, a SSB noise figure of 6.6 dB, an input IP3 of -34.4 dBm and an input 1dB compression point of -39 dBm and consumes only 70 mW at a power supply voltage of 1.5 V.
doi:10.1109/vlsic.2004.1346485 fatcat:suceirrw7rav7cen5tnym2m5xq