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In the present era of miniaturization, higher power dissipation in form of heat has become a very critical issue for the digital Circuits. This excessive heat may result in the lower chip reliability and even destroy it. Due to this reason a substitute is required for the traditional CMOS technology, Reversible logic is a paradigm in this direction. This paper encompasses of the newly proposed SA reversible logic and basic combinational implementations using a single SA building block onlydoi:10.5815/ijmecs.2019.10.06 fatcat:pg5pyxoicbff7f7a2jv6jnh63a