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The investigation of new memory schemes is significant for future generations of electronic devices. The purpose of this research is to present a detailed analysis of the processes in the memory elements of a memory section with memristors and isolating Metal Oxide Semiconductor (MOS) transistors. For the present analysis, a modified window function previously proposed by the author in another memristor model is used. The applied model is based on physical nonlinear current-voltage anddoi:10.3390/electronics7110289 fatcat:vhfivw3bujdq3dbfdy24ygubz4