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Application of instruction analysis/synthesis tools to x86's functional unit allocation
Proceedings. 11th International Symposium on System Synthesis (Cat. No.98EX210)
Designing a cost effective superscalar architecture for x86 compatible microprocessors is a challenging task in terms of both technical difficulty and commercial value. One of the important design issues is the measurements of the distribution of functional unit usage and the micro operation level parallelism (MLP), which together determine the proper allocation of functional units in the superscalar architecture. To obtain such measurements, an x86 instruction set CAD system x86 Workshop is
doi:10.1109/isss.1998.730614
dblp:conf/isss/HuangX98
fatcat:pazbxakdyngsleigvmo5qq4pw4