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Keywords: electrical overstress (EOS), electrostatic discharge (ESD), tunnel field-effect transistor (TFET), power-on conditions, temperature The power-on electrostatic discharge (ESD) and electrical overstress (EOS) events are causing an increasing number of failures in modern integrated circuits (ICs). Tunnel field-effect transistors (TFETs) are considered as a better choice than shallow trench isolation diodes in whole-chip ESD protection networks. We have investigated the characteristics ofdoi:10.18494/sam.2020.2542 fatcat:l3y76rgncfgi7cp34cdlytq4jm