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3-stage variable length continuous-flow scan vector decompression scheme
22nd IEEE VLSI Test Symposium, 2004. Proceedings.
This paper presents a 3-stage continuous-flow linear decompression scheme for scan vectors that uses a variable number of bits to encode each vector. By using 3-stages of decompression, it can efficiently compress any test cube (i.e., deterministic test vector where the unassigned bit positions are left as don't cares) regardless of the number of specified (care) bits. As a result of this feature, there is no need for any constraints on the automatic test generation process (ATPG) process. Any
doi:10.1109/vtest.2004.1299229
dblp:conf/vts/KrishnaT04
fatcat:riivq74gebhirogd7frxnsenqq