GoldMine: Automatic assertion generation using data mining and static analysis

Shobha Vasudevan, David Sheridan, Sanjay Patel, David Tcheng, Bill Tuohy, Daniel Johnson
2010 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)  
We present GOLDMINE, a methodology for generating assertions automatically. Our method involves a combination of data mining and static analysis of the Register Transfer Level (RTL) design. We present results of using GoldMine for assertion generation of the RTL of a 1000-core processor design that is still in an evolving stage. Our results show that GoldMine can generate complex, high coverage assertions in RTL, thereby minimizing human effort in this process.
doi:10.1109/date.2010.5457129 dblp:conf/date/VasudevanSPTTJ10 fatcat:bn537gqo7nexvem7r7mf2fgxdy