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An advanced approach to design a fault coverage test pattern generator by utilizing linear feedback shift register called Bit Swap-LFSR. This could perform fault analysis and also minimize the power utilization at circuit level during tests, by generating three intermediate patterns between random patterns by decreasing the hardware components usage. The main purpose of having intermediate patterns is to minimize the transitional processing at initial inputs; this could minimize the switchingdoi:10.17148/ijireeice.2015.31235 fatcat:h7bzcza2hjhjtmdxbfdzbygdd4