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Optimizing Instruction Scheduling and Register Allocation for Register-File-Connected Clustered VLIW Architectures
2013
The Scientific World Journal
Clustering has become a common trend in very long instruction words (VLIW) architecture to solve the problem of area, energy consumption, and design complexity. Register-file-connected clustered (RFCC) VLIW architecture uses the mechanism of global register file to accomplish the inter-cluster data communications, thus eliminating the performance and energy consumption penalty caused by explicit inter-cluster data move operations in traditional bus-connected clustered (BCC) VLIW architecture.
doi:10.1155/2013/913038
pmid:23970841
pmcid:PMC3732635
fatcat:y2erhzf76jgk3dzt7qunz6jnb4