Accurate high speed empirically based predictive modeling of deeply embedded gridded parallel plate capacitors fabricated in a multilayer LTCC process

R. Poddar, M.A. Brooke
1999 IEEE Transactions on Advanced Packaging  
A novel technique is presented for the accurate, rapid, high frequency, predictive modeling of parallel plate capacitors with gridded plates manufactured in a multilayer low temperature cofired ceramic (LTCC) process. The method is empirical in nature and is based on the concept of incrementally constructing the model for a structure from well characterized individual building blocks. Building blocks are characterized by the use of test structures and measurements, and are modeled using passive
more » ... lumped circuit elements. This method is applied to the predictive modeling of deeply embedded gridded parallel plate capacitor structures. The procedure has been experimentally verified, with accurate predictions of behavior obtained up to the second self resonance for large area gridded parallel plate capacitors. Since lumped element circuits are generated by this method, structure prediction speed is determined by circuit size and simulator small signal analysis time. The method is versatile and is well suited for circuit design applications. Index Terms- Capacitor, circuit models, gridded plane, low temperature cofired ceramic, LTCC, predictive modeling, Sparameters. Ravi Poddar (S'89-M'96) received the B.S.E.E. (with highest honors) and M.S.E.E. degrees in 1991 and 1995, respectively, and the Ph.D. degree in electrical and computer engineering from the Georgia Institute of Technology, Atlanta, in 1998. He is with Integrated Device Technology, Inc., Duluth, GA, working in the area of integrated circuit physical extraction and verification. His research interests include high frequency, computer aided design and modeling of integrated passive devices and multichip modules, high frequency modeling of deep submicron integrated circuit interconnects, CMOS transistor modeling, statistical analysis and yield prediction, and high speed automated test and measurement techniques. Martin A. Brooke (S'85-M'and is developing electronically adjustable parallel analog circuit building blocks that achieve high levels of performance and fault tolerance. His current research interests are in high-speed high-precision signal processing. Current projects include development of adaptive neural network and analog multipliers and dividers, precision analog amplifiers, communication circuits, and sensor signal processing circuitry. To support this large analog and digital systems research, he actively pursues systems level circuit modeling research. He has developed software that reduces the complexity of large analog electronic system models to a user specified tolerance. Dr. Brooke received the NSF Research Initiation Award in 1990.
doi:10.1109/6040.746539 fatcat:jzfdt6b2uvhazlexvw7ltvdaf4