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Shared caches in multicores challenge Worst-Case Execution Time (WCET) estimation due to inter-task interferences. Hardware and software cache partitioning address this issue although they complicate data sharing among tasks and the Operating System (OS) task scheduling and migration. In the context of Probabilistic Timing Analysis (PTA) time-randomised caches are used. We propose a new hardware mechanism to control inter-task interferences in shared time-randomised caches without the need ofdoi:10.1145/2593069.2593235 dblp:conf/dac/SlijepcevicKAQC14 fatcat:ql6d3c4vnbfo3f3jvtl46eetla