A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2001; you can also visit the original URL.
The file type is
A heuristic covering technique for optimizing average-case delay in the technology mapping of asynchronous burst-mode circuits
Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition
This paper presents a covering technique for optimizing the average-case delay of asynchronous burst-mode control circuits during technology mapping. The speci cation and NAND-decomposed unmapped network of these circuits are rst preprocessed using stochastic techniques to determine the relative frequency of occurrence o f e ach state transition and the corresponding sensitized paths through the NAND-decomposed network. We minimize the sum of the implementation's cycle times of the statedoi:10.1109/eurdac.1996.558218 dblp:conf/eurodac/BeerelCY96 fatcat:qkilxnvgzjajhdxruodieae6mu