A heuristic covering technique for optimizing average-case delay in the technology mapping of asynchronous burst-mode circuits

P.A. Beerel, K.Y. Yun, Wei-Chun Chou
Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition  
This paper presents a covering technique for optimizing the average-case delay of asynchronous burst-mode control circuits during technology mapping. The speci cation and NAND-decomposed unmapped network of these circuits are rst preprocessed using stochastic techniques to determine the relative frequency of occurrence o f e ach state transition and the corresponding sensitized paths through the NAND-decomposed network. We minimize the sum of the implementation's cycle times of the state
more » ... ions, weighted by their relative frequencies, thereby optimizing for averagecase performance. Our results demonstrate that a 10-15 improvement in performance c an be achieved with run-times comparable to synchronous techniques.
doi:10.1109/eurdac.1996.558218 dblp:conf/eurodac/BeerelCY96 fatcat:qkilxnvgzjajhdxruodieae6mu