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Reproducible Evaluation of System Efficiency with a Model of Architecture: From Theory to Practice
2017
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Current trends in high performance and embedded computing include design of increasingly complex hardware architectures with high parallelism, heterogeneous processing elements and non-uniform communication resources. In order to take hardware and software design decisions, early evaluations of the system non-functional properties are needed. These evaluations of system efficiency require Electronic System-Level (ESL) information on both the algorithms and the architecture. Contrary to
doi:10.1109/tcad.2017.2774822
fatcat:3o7p7pfwazhpvfzycvyruz4a64