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Abstruct-In this paper we study the power savings possible using double edge triggered (DET), instead of, conventional single edge triggered (SET) flip-flops. We begin the paper by introducing a set of novel D-type double edge triggered flip-flops which can be implemented with fewer transistors than any previous design. The power dissipation in these flipflops and single edge triggered flip-flops is compared via architectural level studies, analytical considerations and simulations. Thedoi:10.1109/92.285754 fatcat:sjw4d25sdvdvfbnrrl4xenym2u