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Despite high potential and flexibility in developing new functionalities and mechanisms, as well as the availability of wellestablished networking SW, common criticism of Software Routers, based on COTS HW elements and open-source SW, is mainly focused on performance, especially for issues concerning the data plane. In this respect, our contribution is aimed at evaluation of architectural bottlenecks limiting the scalability of Software Router performance, and identification of SW and HWdoi:10.1145/1397718.1397725 dblp:conf/sigcomm/BollaB08 fatcat:rhtvkaukabc5hc7e7goinevx5i