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Loops in esterel
2005
ACM Transactions on Embedded Computing Systems
Esterel is a synchronous design language for the specification of reactive systems. Thanks to its compact formal semantics, code generation for Esterel is essentially provably correct. In practice, due to the many intricacies of an optimizing compiler, an actual proof would be in order. To begin with, we need a precise description of an efficient translation scheme, into some lowerlevel formalism. We tackle this issue on a specific part of the compilation process: the translation of loop
doi:10.1145/1113830.1113832
fatcat:ege3szwbhrdydd4rfdj5qywd2a