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Stretching the limits of FPGA SerDes for enhanced ATE performance
2010
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)
This paper describes a multi-gigahertz test module to enhance the performance capabilities of automated test equipment (ATE), such as high-speed signal generation, loopback testing, jitter injection, etc. The test module includes a core logic block consisting of a high-performance FPGA. It is designed to be compatible with existing ATE infrastructure; connecting to the device under test (DUT) via a device interface board (DIB). The core logic block controls the test module's functionality,
doi:10.1109/date.2010.5457212
dblp:conf/date/MajidK10
fatcat:7rkgbh5jrneqbcdqrfri6lqlwq