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A Framework for Evaluating High-Level Design Methodologies for High-Performance Reconfigurable Computers
2011
IEEE Transactions on Parallel and Distributed Systems
High-performance reconfigurable computers have potential to provide substantial performance improvements over traditional supercomputers. Their acceptance, however, has been hindered by productivity challenges arising from increased design complexity, a wide array of custom design languages and tools, and often overblown sales literature. This paper presents a review and taxonomy of High-Level Languages (HLLs) and a framework for the comparative analysis of their features. It also introduces
doi:10.1109/tpds.2010.67
fatcat:bmhryozczzgg3hpymi4q75ckr4