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Proceedings of the conference on Design, automation and test in Europe - DATE '08
Multi-issue processors can exploit the Instruction Level Parallelism (ILP) of programs to improve the performance greatly. How to reduce the energy consumption while maintaining the high performance of programs running on multiissue processors remains a challenging problem. In this paper, we propose a novel approach to apply the instruction register file (IRF) technique from single-issue processor to VLIW architecture. Frequently executed instructions are selected to be placed in the on-chipdoi:10.1145/1403375.1403559 fatcat:55gxvy6ca5ewfcwmngkwuqjc6u