For the transmission of signals at higher frequencies, there is a requirement for extension of a higher capacity system and higher bandwidth in wireless communication systems. The use of smart antenna increases the system performance with the arrangements of its constituent elements and digital signal processing capacity. Analysis and design of smart antenna arrays can be performed for wireless communication systems using various methods and approaches. One of these methods is circular pin-fed

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... inearly polarized patch antenna has been adopted in this research work. This work presents the design and analysis of smart antenna by circular pin-fed linearly polarized patch antenna. Patch antenna is a very prominent antenna in the microwave frequency spectrum due to its simplicity and compatibility with the printed circuit board (PCB) technology. (2012) in the field of RF Microelectronics and VLSI Design from Jaypee University of Information Technology, Solan, Himachal Pradesh, India and received the Master degree (2008) in VLSI design from Centre for Development of Advanced Computing (C-DAC), Noida, India and the Bachelor degree (2002) in Electronics and Instrumentation Engineering from the Rohilkhand University, Bareilly, India. He was with the Semiconductor Process and Wafer Fabrication Centre of BEL Laboratories, Bangalore, India, where he worked on characterization of MOS devices, fabrication of devices and development of circuit design. Currently, he is a faculty in Department of Electronics Engineering, School of Engineering, Howard College, University of KwaZulu-Natal, Durban, South Africa. His research and teaching interests includes VLSI design, Nanotechnology, RF design and CAD with particular emphasis in low-power design, Chip designing, Antenna Designing, VLSI testing and verification and Wireless communication systems. Prof. Viranjay M. Srivastava is a Doctorate He has more than 11 years of teaching and research experience in the area of VLSI design, RFIC design, and Analog IC design. He has supervised a number of B. Tech. and M. Tech. theses. He is a member of IEEE, ACEEE and IACSIT. He has worked as a reviewer for several conferences and Journals both national and international. He is author of more than 80 scientific contributions including articles in international refereed Journals and Conferences and also author of following books, 1) VLSI Technology, 2) Characterization of C-V curves and Analysis, Using VEE Pro Software: After Fabrication of MOS Device, and 3) MOSFET