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High-diagnosability online built-in self-test of FPGAs via iterative bootstrapping
2005
Proceedings of the 15th ACM Great Lakes symposium on VLSI - GLSVSLI '05
We develop a novel on-line built-in self-test (BIST) technique for testing FPGAs that has a very high diagnosability even in presence of clustered faults, a fault pattern for which previous BIST methods proved ineffective. Using an iterative bootstrapping process, our method first finds a faultfree test circuit in each BISTer tile and then tests the PLBs functionally using a fault-detection-and-gross-diagnosis phase followed by a time-efficient adaptive diagnosis phase. We establish the
doi:10.1145/1057661.1057682
dblp:conf/glvlsi/SutharD05
fatcat:ezg4glfrbjfpzehrfhh3s6wn7y