A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2018; you can also visit the original URL.
The file type is application/pdf.
Hardware Implementation of a Neuro-Fuzzy Controller Using High Level Synthesis Tool
2015
MACRo 2015
Preserved Fulltext
The purpose of this work is to present the design flow and the implementation of a neuro-fuzzy controller Intellectual Property (IP) core, using High Level Synthesis (HLS) tool. The realized IP core is designed for FPGA based embedded system architectures. The implemented control algorithm is a Sugeno model based Adaptive Neuro-Fuzzy Inference System (ANFIS). The optimization possibilities using the HLS tool and the designing of the interfaces for the IP core are presented.
doi:10.1515/macro-2015-0018
fatcat:fwrg37tdofbtvp3m6djt3jkyyq