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Synthesis of parallel adders from if-decision diagrams
2020
Sistemnyj Analiz i Prikladnaâ Informatika
Addition is one of the timing critical operations in most of modern processing units. For decades, extensive research has been done devoted to designing higher speed and less complex adder architectures, and to developing advanced adder implementation technologies. Decision diagrams are a promising approach to the efficient many-bit adder design. Since traditional binary decision diagrams does not match perfectly with the task of modelling adder architectures, other types of diagram were
doi:10.21122/2309-4923-2020-2-61-70
fatcat:c5apneo23zc3dbi3uwaw7x5qsm