Jin-Hyuk Yang, Jong-Sun Kim, Hyun-Dhong Yoon, Jae-Yeol Kim, Kun-Moo Lee, Chan-Soo Hwang, In-Hyung Kim, Jun-Sung Kim, Kwang-11 Park, Kyu-Ho Park, Yong-Hoon Lee, Byoung-Woon Kim (+10 others)
1998 Proceedings of the 35th annual conference on Design automation conference - DAC '98  
This paper describes the MetaCore system which is an ASIP(App1ication-Specific Instruction set Processor) development system targeted for DSP applications. The goal of MetaCore system is to offer an efficient design methodology meeting specifications given as a combination of performance, cost and design turnaround time. MetaCore system consists of two major design stages: design exploration and design generation. In the design exploration stage, MetaCore system accepts a set of benchmark
more » ... of benchmark programs and a formal specification of ISA(1nstruction Set Architecture), and estimates the hardware cost and performance for each hardware configuration being explored. Once a hardware configuration is chosen, the system helps generate a VLSI processor design in the form of HDL along with the application program development tools such as C compiler, assembler and instruction set simulator.
doi:10.1145/277044.277247 dblp:conf/dac/YangKNCSRKLLKYKLHKKPPLHPK98 fatcat:u6lom5prjzdcheqftqgewe4hae