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Revisiting the Complexity of Hardware Cache Coherence and Some Implications
2014
ACM Transactions on Architecture and Code Optimization (TACO)
Cache coherence is an integral part of shared-memory systems but is also widely considered to be one of the most complex parts of such systems. Much prior work has addressed this complexity and the verification techniques to prove the correctness of hardware coherence. Given the new multicore era with increasing number of cores, there is a renewed debate about whether the complexity of hardware coherence has been tamed or whether it should be abandoned in favor of software coherence. This
doi:10.1145/2663345
fatcat:hfv74ibolbg6zbjojgvptj674u