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Octilinear redistributive routing in bump arrays
2009
Proceedings of the 19th ACM Great Lakes symposium on VLSI - GLSVLSI '09
This paper proposes a scheme for automatic re-distribution layer (RDL) routing, which is used in chip-package connections. Traditional RDL routing designs are mostly performed manually because the wire geometries are more flexible and therefore more difficult to handle on RDL than on chip. For example, octilinear routing is manufacturable in RDL and is widely adopted due to its higher efficiency than Manhattan routing. In this paper we devise a polynomial time octilinear RDL routing algorithm
doi:10.1145/1531542.1531591
dblp:conf/glvlsi/WangC09
fatcat:ckovzsy7hzhlzc2z3glh6fag74