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This article presents the analysis and comparison of two powerful tools to explore design space and study multi-core microprocessors. Heracles, developed at the MIT, is a modular tool to create MIPS multi-core processors. Its modularity allows quick development by varying the types of processor, memory, network interconnect and cache. RISC-V is a new instruction set architecture, developed at the University of California, Berkeley, that has several tools for designing architectures and<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.17706/jcp.13.5.555-563">doi:10.17706/jcp.13.5.555-563</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/i4km2rnotfcpbgd7eqci6o6d6a">fatcat:i4km2rnotfcpbgd7eqci6o6d6a</a> </span>
more »... s that use this instruction set. The Rocket Chip Generator is one of these tools. It is the equivalent of Heracles for the MIPS architecture and, as such, provide several features that allows rapid development of RISC-V multi-core processors. We compared the target hardware and software features of these tools. The Rocket Chip Generator proved to be an excellent tool for the development of new RISC-V processors whereas Heracles seemed a more adequate tool for teaching and parallel architecture research at higher levels of abstraction.
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