Two-Stage Stuck-at Fault Test Data Compression Using Scan Flip-Flops with Delay Fault Testability

Kentaroh Katoh, Kazuteru Namba, Hideo Ito
2008 IPSJ Transactions on System LSI Design Methodology  
This paper presents a stuck-at fault test data compression using the scan flip flops with delay fault testability namely the Chiba scan flip-flops. The feature of the proposed method is two-stage test data compression. First, test data is compressed utilizing the structure of the Chiba scan flip flops (the first stage compression). Second, the compressed test data is further compressed by conventional test data compression utilizing X bits (the second stage compression). Evaluation shows that
more » ... en Huffman test data compression is used in the second stage compression, the volume of test data for the proposed test data compression in ATE is reduced 35.8% in maximum, 25.7% on average of the one of the test data compressed by the conventional method. The difference of the area overhead of the proposed method from the conventional method is 9.5 percent point.
doi:10.2197/ipsjtsldm.1.91 fatcat:7vkxylbxybhxdcouzbqpxckf74