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In recent years, computational capacity o f single Field Programmable Gate Array (FPGA) devices as well as their versatility have increased significantly. Adding to that fact, the High Level Synthesis frameworks allowing to program such processors in a high-level language like C + + , makes modern FPG A devices a serious candidate as building blocks o f a general-purpose High Performance Computing solution. In this contribution we describe benchmarks which we performed using a kernel from thedoi:10.14529/jsfi190204 fatcat:ugjymewlurbddi3ifvbmdy2tyq