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Go functional model for a RISC-V asynchronous organisation — ARV
2017
2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
This work presents ARV, an asynchronous superscalar organisation for the RISC-V architecture. As far as the authors could verify, this is the first proposal of an asynchronous version for this recent open source processor architecture. The organisation is modelled using Google's Go as a high level hardware description language. Go has proved adequate to model the refined handshake structures present in the asynchronous design of complex super-scalar structures. Preliminary performance data
doi:10.1109/icecs.2017.8292066
dblp:conf/icecsys/SartoriC17
fatcat:6zxlvsyexrfklnt7xhlutdbq3e