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A 300nW near-threshold 187.5–500 kHz programmable clock generator for ultra low power SoCs
2015
2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)
implemented in a 0.13μm CMOS process. The entire Index Terms -
doi:10.1109/s3s.2015.7333528
fatcat:tgdw3v672fh7hiehgk6gz7o7by