Elastic circuit design is a revolutionary step in VLSI design paving the way for commercial adoption of asynchronous design techniques. With a growing trend of synchronousasynchronous CAD tool flow integration, this paradigm shows promise to survive market forces of the semiconductor industry mainly due to scope for reuse of synchronous functional blocks and IP cores, and co-existence of synchronous and asynchronous design styles in a common EDA framework. In this paper, we introduce 'Elastic

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... ndles', a novel class of elastic circuits, and propose a method for modelling, designing and synthesising these circuits. Starting with a high-level dataflow model of a system, which is natively asynchronous, the key idea is to introduce rigidity of chosen granularity levels without changing functional behaviour. The resulting model is then partitioned into functional blocks of fine-grained and coarse-grained asynchronous elements that would finally be transformed to equivalent circuit descriptions for system logic synthesis using standard EDA tools. The methodology is illustrated using a case study of a 16-point FFT circuit design, which clearly demonstrates a spectrum of solutions that can be achieved in different levels of bundling granularity.