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Proceedings of the 2006 conference on Asia South Pacific design automation - ASP-DAC '06
With technology scaling, elevated temperatures caused by increased power density create a critical bottleneck modulating the circuit operation. With the advent of FinFET technologies, cooling of a circuit is becoming a bigger challenge because of the thick buried oxide inhibiting the heat flow to the heat sink and confined ultra-thin channel increasing the thermal resistivity. In this work, we propose compact thermal models to predict the temperature rise in FinFET structures. We developdoi:10.1145/1118299.1118362 fatcat:nsugkm324vctvj7g67wzhwz5mu