A D-BAND POWER AMPLIFIER WITH 30-GHZ BANDWIDTH AND 4.5-DBM PSAT FOR HIGH-SPEED COMMUNICATION SYSTEM

Bo Zhang, Yong-Zhong Xiong, Lei Wang, Sanming Hu, Teck-Guan Lim, Yi-Qi Zhuang, Le-Wei Li
2010 Electromagnetic Waves  
This paper presents a D-band power amplifier for highspeed communication system. The capacitive effect of interconnection via on transistor performance at high frequency is analyzed and a new via structure is employed to reduce the capacitive effect. The on-chip matching technique for high frequency amplifier is analyzed and the thin-film microstrip line matching network is used, which is combined with biasing network to reduce RF signal loss and silicon cost. The amplifier is fabricated in
more » ... s fabricated in 0.13-µm SiGe BiCMOS process. The experimental results show a 7 dB gain at 130 GHz with 3-dB bandwidth of 30-GHz. The input return loss is better than 10 dB over 23 GHz. In addition, this amplifier achieves saturated output . of −4.5 dBm. The chip size of implemented power amplifier is only 0.22 mm 2 . INTRODUCTION With the development of data communication and multimedia applications, the demand of high-speed integrated circuits operating at tens of gigabits per second is rapidly growing [1] [2] [3] [4] . Recently, some communication systems operate at 40 Gb/s have been proposed to meet the requirement of high speed communication. For a 40 Gb/s communication system, the bandwidth of whole system is needed to be larger than 25-GHz [5] and the carrier frequency has to be tens of gigahertz or even beyond hundreds of gigahertz. The III-V compound semiconductor is assumed a good candidate for high frequency operation. To date, it is used in most of the millimeter-wave circuit design. However, due to its incompatibility with commonly used low-cost CMOS intermediate frequency or base-band circuit and high fabrication cost, the III-V compound semiconductor is not the best choice for integrated system-on-chip (SoC) circuit design. In recent years, with the downscaling of device size, silicon-base transistor is capable to operate at higher and higher frequency. The demonstrated f T and f max of SiGe HBT technology is comparable with III-V compound semiconductor [6] . As demonstrated in previous publications [7] [8] [9] [10] [11] , with good performance, compatibility with lowcost CMOS intermediate frequency or base-band circuit and also feature advanced passive components, the SiGe HBT BiCMOS technology becomes a favorable candidate for high frequency integrated circuit design. The power amplifier is a key part in high frequency communication system. Although the available operating frequency of modern siliconbased transistor is very high, it is still a challenge to design a high frequency power amplifier with certain performance requirement [12] [13] [14] [15] . In [16, 17] , beyond 100 GHz amplifiers were realized in 65nm CMOS technique. However, the bandwidth and linearity is not sufficient for our application. In addition, with the downscaling of transistor size, not only the cost is increased dramatically, some other limitations are also shown [18] . An amplifier was fabricated in SiGe technology, by using multistage cascode structure to achieve higher gain [19] . But by using the cascode structure, the higher supply voltage is required and then the efficiency will be deteriorated. Moreover, the linearity which is very important in our application is also affected by using the cascode structure. So it is not applicable for our design.
doi:10.2528/pier10060806 fatcat:hpg3fx3x5rbb7pinfkjtbenvkm