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The TERAFLUX Project: Exploiting the DataFlow Paradigm in Next Generation Teradevices
2013
2013 Euromicro Conference on Digital System Design
Preserved Fulltext
Thanks to the improvements in semiconductor technologies, extreme-scale systems such as teradevices (i.e., composed by 1000 billion of transistors) will enable systems with 1000+ general purpose cores per chip, probably by 2020. Three major challenges have been identified: programmability, manageable architecture design, and reliability. TERAFLUX is a Future and Emerging Technology (FET) large-scale project funded by the European Union, which addresses such challenges at once by leveraging the
doi:10.1109/dsd.2013.39
dblp:conf/dsd/SolinasBBCEFFGGGGKKLLMMNPTUVWWZG13
fatcat:ubsmqg7w3zdi7f3g7i33ng2oce