Reconfigurable FPGA-based switching path frequency-domain echo canceller with applications to voice control device

Ka Fai Cedric Yiu, Yao Lu, Chun Hok Ho, Wayne Luk, Jiaquan Huo, Sven Nordholm
2012 Digital signal processing (Print)  
Acoustic echo control is of vital interest for hands-free operation of telecommunications equipment. An important property of an acoustic echo canceller is its capability to handle double-talk and be able to operate in real time. When it is applied to intelligent voice control device, it is important to suppress the speech from the device and enhance the speech of the user for speech recognition, where doubletalk situation is frequently occurred. In this paper, we propose a novel hardware
more » ... ecture to support a robust adaptive algorithm in combination with a switching path model to tackle the double-talk situation. The proposed switching path model avoids adapting two filters at the same time during double-talk and prevents the disadvantage of the conventional two-path model. In order to achieve computational efficiency and to meet the rigorous timing requirements, the echo canceller is operated in the frequency domain and its computing power is raised by a hardware accelerator implemented in the FPGA fabric surrounding a PowerPC on a Xilinx XUP V2P platform. Results obtained show the echo canceller is successful in handling double-talk situation and the sub-band implementation has improved convergence significantly. An overall improvement by 82.5 times is achieved when a hardware accelerator is used to perform the critical part of the algorithm over a pure software implementation running on a 300 MHz embedded PowerPC processor. His research interests include computer arithmetic, computer architecture, design automation, and optimization. Wayne Luk received the M.A., M.Sc., and D.Phil. degrees in engineering and computing science from the University of Oxford, Oxford, UK. He is a Professor of computer engineering with the Department of Computing, Imperial College London, London, UK, and a Visiting Professor with Stanford University, Stanford, CA, and with Queen's University Belfast, Belfast, UK. His research interests include theory and practice of customising hardware and software for specific application domains, such as multimedia, communications, and finance. Much of his current work involves highlevel compilation techniques and tools for parallel computers and embedded systems, particularly those containing reconfigurable devices such as field-programmable gate arrays. Jiaquan Huo received his B.E. in Electronic Engineering from the South China University of Technology, and hist M.Eng. and Ph.D. from Curtin University of Technology. He is currently a staff engineer with Dolby Laboratories, Australia.
doi:10.1016/j.dsp.2011.10.008 fatcat:d3p3c2jvhfaetp5la25sdkyujm