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High level design space exploration of RVC codec specifications for multi-core heterogeneous platforms
2010
2010 Conference on Design and Architectures for Signal and Image Processing (DASIP)
Nowadays, the design flow of complex signal processing embedded systems starts with a specification of the application by means of a large and sequential program (usually in C/C++). As we are entering in the multicore era, sequential programs are no longer the most appropriate way to specify algorithms targeted to run on several processing units. The new ISO/MPEG Reconfigurable Video Coding (RVC) standard is proposing a new paradigm for specifying and designing complex signal processing
doi:10.1109/dasip.2010.5706264
dblp:conf/dasip/LucarzRM10
fatcat:ufblw2ft6rh3flznr3rh2hs4ry