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Power consumption within the memory hierarchy grows in importance as on-chip data caches occupy increasingly greater die area. Among dynamic power conservation schemes, horizontal partitioning reduces average power per data access by employing multiple smaller structures or using cache subbanks. For instance, region-based caching places small caches dedicated to stack and global accesses next to the L1 data cache. With respect to static power dissipation, leakage power may be addressed at bothdoi:10.1145/1062261.1062322 dblp:conf/cf/GeigerMT05 fatcat:j5wuruvar5fmpkeijats2ljstm