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In this paper, a 5-bit 500MS/s flash analog-to-digital converter (ADC) with temperature-compensated inverter-based comparators is proposed. In the proposed ADC, a complementary-average system structure is adopted. Based on this structure, inverter-based comparators are used to reduce the power consumption. However, conventional inverter-based comparators suffer from switching threshold variation when the temperature changes, which degrades the SNDR performance of the whole ADC. To tackle thisdoi:10.1016/j.ssel.2020.01.007 fatcat:w6kgx7m33va5pnkpzqthgtnbbq