Low-Power Die-Level Process Variation and Temperature Monitors for Yield Analysis and Optimization in Deep-Submicron CMOS

Amir Zjajo, Manuel J. Barragan, José Pineda de Gyvez
2012 IEEE Transactions on Instrumentation and Measurement  
This paper reports design, efficiency, and measurement results of the process variation and temperature monitors for yield analysis and enhancement in deep-submicron CMOS circuits. Additionally, to guide the verification process with the information obtained through monitoring, two efficient algorithms based on an expectation-maximization method and adjusted support vector machine classifier are proposed. The monitors and algorithms are evaluated on a prototype 12-bit analog-todigital converter
more » ... todigital converter fabricated in standard single poly six-metal 90-nm CMOS.
doi:10.1109/tim.2012.2184195 fatcat:miaotnrmnzgvjp5xanfa6zrqje