Combining architecture exploration and a path to implementation to build a complete SoC design flow from system specification to RTL

M.A. Dziri, F. Samet, F.R. Wagner, W.O. Cesario, A.A. Jerraya
Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003.  
This paper presents a full System-on-Chip (SoC) design flow from system specification to RT-level. A new approach to obtain a full path to implementation for SoC design is proposed. This approach combines architecture design space exploration using the VCC design environment and system synthesis using the ROSES design flow, allowing a true and complete system level design flow. The experiment with a VDSL application shows a significant reduction of design time. Abstract architecture
more » ... tecture Architecture Exploration : HW/SW partitioning + performance test Architecture Design : Components design + HW/SW interfaces design VCC ROSES Macro architecture RTL architecture Link Developped tool (a). Combining VCC and ROSES in a single design flow System Specification Application + Requirement Abstract architecture Architecture Exploration : HW/SW partitioning + performance test Architecture Design : Components design + HW/SW interfaces design VCC ROSES Macro architecture RTL architecture Link Developped tool System Specification Application + Requirement Abstract architecture Architecture Exploration : HW/SW partitioning + performance test
doi:10.1109/aspdac.2003.1195020 fatcat:65y5optnizby5puls5c66ejewe