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We investigate the dominant frequencydependent systematic error signals (SES) in the ac Josephson voltage standard. We describe our error measurement technique and a number of methods to reduce the errors. Most importantly we found that a small change in on-chip wiring significantly reduced the SES, improved SES measurement stability, and enabled a suitable bias correction method. We demonstrate that reduction of the SES using various techniques greatly improves agreement between the ac-dcdoi:10.1109/tim.2007.915100 fatcat:lppgszzcpjhwnd7hnw3na32te4