Evaluation of multiprocessor memory systems using off-line optimal behavior

William J. Bolosky, Michael L. Scott
1992 Journal of Parallel and Distributed Computing  
In recent years, much effort has been devoted to analyzing the performance of distributed memory systems for multiprocessors. Such systems usually consist of a set of memories or caches, some device such as a bus or switch to connect the memories and processors, and a policy for determining when to put which addressable objects in which memories. In attempting to evaluate such systems, it has generally proven difficult to separate the performance implications of the hardware architecture from
more » ... ose of the policy that controls the hardware (whether implemented in software or hardware). In this paper we describe the use of off-line optimal analysis to achieve this separation. Using a trace-driven dynamic programming algorithm, we compute the policy decisions that would maximize overall memory system performance for a given program execution. The result allows us to eliminate the artifacts of any arbitrarily chosen policy when evaluating hardware performance, and provides a baseline against which to compare the performance of particular, realizable, policies. We illustrate this technique in the context of software-controlled page migration and replication and argue for its applicability to other forms of multiprocessor memory management. Q 1992 Academic press, inc.
doi:10.1016/0743-7315(92)90051-n fatcat:esusar3u4ndchnupc7p5m2dduy