CMOS IC Technology Scaling and Its Impact on Burn-In

A. Vassighi, O. Semenov, M. Sachdev, A. Keshavarzi, C. Hawkins
2004 IEEE transactions on device and materials reliability  
This article describes how CMOS IC technology scaling impacts semiconductor burn-in and burn-in procedures. Burn-in is a quality improvement procedure challenged by the high leakage currents that are rapidly increasing with IC technology scaling. These currents are expected to increase even more under the new burn-in environments leading to higher junction temperatures, possible thermal runaway, and yield loss of good parts during burn-in. The paper discusses the effect of junction temperature
more » ... n device reliability, aging, and burn-in procedure optimization. The effect of device thermal runaway and the requirements it forces on commercial burn-in ovens, device package, and device cooling are also described.
doi:10.1109/tdmr.2004.826591 fatcat:v3acbhskxrawfcgeas5ru7t26m