Accurately modeling speculative instruction fetching in trace-driven simulation

R. Bhargava, L.K. John, F. Matus
1999 1999 IEEE International Performance, Computing and Communications Conference (Cat. No.99CH36305)  
Performance evaluation of modern, highly speculative, out-of-order microprocessors and the corresponding production of detailed, valid, accurate results have become serious challenges. A popular evaluation methodology is trace-driven simulation which provides the advantage of a highly portable simulator that is independent of the constraints of the trace generation system. While developing and maintaining a trace-driven simulator is relatively easier than other alternatives, a primary drawback
more » ... a primary drawback is the inability to accurately simulate speculative instruction fetching and subsequent execution. Fetching from an incorrect path occurs often in a speculative processor, however it is di cult to capture this information in a trace. This paper investigates a scheme to accurately model instruction fetching within a trace-driven framework. This is accomplished by recreating an approximate copy of the object code segment, which we call resurrected code, using a preliminary pass through the trace. We discuss a fast and memory-e cient method for implementing this resurrected code. In addition, we characterize UltraSPARC traces of C, C++, and Fortran programs generated using Shade to determine the potential of this method. Using these traces, and a m o dest branch predicting scheme, we nd that in 14 of 16 cases more than 99 of all branches will nd their target instruction in the resurrected code. Furthermore, on these occasions, a large amount of consecutive instructions are available along the mispredicted path. These results indicate that the inaccuracies associated with speculative fetching in trace-driven simulation can be signi cantly reduced using this resurrected c o de. L.
doi:10.1109/pccc.1999.749422 dblp:conf/ipccc/BhargavaJM99 fatcat:yeah762drvblhgwucemcn7w52y